Texas InstrumentsTSW1266EVMKit e schede di sviluppo di convertitori di dati

The TSW1266EVM is a wideband complex receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain contains a complex demodulator, TI’s LMH6521 dual-channel DVGA and ADS5402 12-bit 800-MSPS dual-channel ADC. The signal chain can be configured for a variety of frequency plans by modifying the onboard filter components. The TSW1266EVM also includes TI’s LMK04808 8 dual-PLL clock jitter cleaner and generator to provide an onboard low-noise clocking solution. The gain of the LMH6521 DVGA can be controlled through the GUI or alternatively through the high speed connector with an FPGA. The EVM is designed to mate with the TSW1400EVM pattern capture and generation board to capture data from the ADC. Signal analysis can then be performed with the High Speed Data Converter Pro software tool.

• The TSW1266EVM allows for multiple clocking configurations by using the LMK04800 clock jitter cleaner and generation chip
• External Clock Mode: The LMK04800 can be setup in clock distribution mode to allow the use of an external clock source.
• Onboard Clock using Single PLL Mode: In this mode, the 122.88-MHz VCXO is used to generate other frequencies by using the single PLL mode of the LMK04800
• Onboard Clock using Dual PLL Mode: This mode of operation allows the user to provide a low frequency reference through the CLKIN1 connector to generate a synchronized sampling clock

TSW1266 Wideband RF-to-Digital Complex Receiver-Feedback Signal Chain

TSW1266EVM Evaluation Module

TSW1266EVM Design Package rev A

TSW1266 GUI Software