PCI express switches is a device that switches PCI express (PCIe) buses on motherboards of computers or similar applications. PCIe is a switch-based technology used to interconnect a large number of peripheral devices to a processor system. This is accomplished by a packet based communications protocol controlling traffic through each switch providing among other features quality of service (QoS), hot plug/ hot plug, interrupt handling and error handling services. Packets of data are routed through switches based upon memory address, I/O address, device ID or by implicit transactions.Data transfer switching takes place by using the information in transaction layer packet (TLP) headers. There are a number of different types of transfers pertaining to reading and writing between PCIe buses and whether the data is posted or non-posted (the way the PCIe schedules and transacts data transfers). Data is transferred between end points and are routed so as any data communication in one direction follows the same direction through PCIe Switches in the back path with information stored in what is called the completer TLP. This is part of the transaction model where there is a requester and a completer. Devices with multiple PCIe ports must handle their traffic, the forwarding of that traffic, and this peer-to-peer communication must also be supported by switches. Peer-to-peer connection imposes additional physical layout constraints when laying out the switch on the motherboard. Switches can also reorder memory transactions for purposes of optimizing bus transfer efficiency when they comply with rules that make such reordering safe. They also must manage the situation where an arbitrary number of switches may be cascaded in between transaction end points. They also handle errors in a transaction process. These include CRC errors, errors in framing or transaction completion timeouts. They can also check for overflow of buffers in the receiver endpoint and unexpected completion events. data link layer and physical layer errors are also checked for. Switches are also responsible for reset on their bus systems, and there is a protocol involving hot reset messaging and forwarding resets from one bus to another. When a switch has to support more than a point-to-point link and provide additional connections it is called a fan-out switch. Its purpose is to multiply the number of PCIe lanes from an upstream host port to an increased number of PCIe devices downstream. PCIe Switches are known by the generation standard of PCIe it supports. The latest PCIe Switch devices support 'GEN 3' (8GT/s). Some Gen 3 devices incorporate sophisticated services to facilitate design and to debug like the ability of software to view the physical signal eye after equalization. Read more Read less