SyncE Jitter Attenuating Clock
Download the ClockBuilder Pro Software from Silicon Labs here. The ClockBuilder Pro is designed to simplify clock tree design design and device configuration.
| EU RoHS | Compliant |
| ECCN (US) | EAR99 |
| Part Status | Active |
| HTS | 8542330001 |
| Number of Outputs per Chip | 2 |
| Clock Input Frequency (MHz) | 0.008 to 710 |
| Maximum Output Frequency (MHz) | 808 |
| Typical Duty Cycle (%) | 60(Max) |
| Input Logic Level | Crystal|LVCMOS |
| Output Logic Level | CML|CMOS|LVDS|LVPECL |
| Minimum Operating Supply Voltage (V) | 2.25 |
| Typical Operating Supply Voltage (V) | 2.5|3.3 |
| Maximum Operating Supply Voltage (V) | 3.63 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Packaging | Tape and Reel |
| EDA / CAD Models |
|
A datasheet is only available for this product at this time.
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SyncE Jitter Attenuating Clock
Download the ClockBuilder Pro Software from Silicon Labs here. The ClockBuilder Pro is designed to simplify clock tree design design and device configuration.
| EU RoHS | Compliant |
| ECCN (US) | EAR99 |
| Part Status | Active |
| HTS | 8542330001 |
| Number of Outputs per Chip | 2 |
| Clock Input Frequency (MHz) | 0.008 to 710 |
| Maximum Output Frequency (MHz) | 808 |
| Typical Duty Cycle (%) | 60(Max) |
| Input Logic Level | Crystal|LVCMOS |
| Output Logic Level | CML|CMOS|LVDS|LVPECL |
| Minimum Operating Supply Voltage (V) | 2.25 |
| Typical Operating Supply Voltage (V) | 2.5|3.3 |
| Maximum Operating Supply Voltage (V) | 3.63 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Packaging | Tape and Reel |
| EDA / CAD Models |
A datasheet is only available for this product at this time.
Contact and Support
Programs and Partners
Product Categories
Manufacturers
