Altera/Intel Programmable SolutionsEP3SE110F1152C3NFPGA
FPGA Stratix® III E Family 107500 Cells 500MHz 65nm Technology 1.1V 1152-Pin FC-FBGA Tray
| Compliant with Exemption | |
| 3A001.a.7.a | |
| Obsolete | |
| 8542330001 | |
| Automotive | No |
| PPAP | No |
| Stratix® III E | |
| 744 | |
| 65nm | |
| 24 | |
| Utilize Memory | |
| 1.1 | |
| 107500 | |
| 896 (18x18) | |
| SRAM | |
| 8727 | |
| 16+639+2150 | |
| Multi-Channel HD/DCI JPEG 2000 Encoder (BA110)|PowerPC/SH/1960 System Controller|RapidIO to AXI Bridge Controller (RAB)|Viterbi Compiler, Low-Speed/Hybrid Serial Decoder | |
| Altera/CAST, Inc/Mobiveil, Inc/Eureka Technology Inc/Barco Silex | |
| 107500 | |
| 16 | |
| 8 | |
| No | |
| No | |
| Yes | |
| No | |
| 500 | |
| 3 | |
| LVDS|LVPECL | |
| LVCMOS|LVTTL | |
| DDR2 SDRAM|DDR3 SDRAM|QDRII+SRAM|RLDRAM II | |
| 1.05 | |
| 1.15 | |
| 1.2|1.5|1.8|2.5|3.3 | |
| 0 | |
| 85 | |
| Commercial | |
| Stratix | |
| Mounting | Surface Mount |
| Package Height | 2.8 |
| Package Width | 35 |
| Package Length | 35 |
| PCB changed | 1152 |
| Standard Package Name | BGA |
| Supplier Package | FC-FBGA |
| 1152 | |
| Lead Shape | Ball |
| EDA / CAD Models |