A PCI bridge chip is a device that connects a PCI bus to either another PCI bus or a bus of a different standard. Peripheral component interface (PCI) is a local computer processor bus that connects peripherals to the system as if they were directly memory mapped on the processors system memory address space. PCI bridge chips are called planar devices according to the PCI specification because they are usually on the motherboard itself. A bridge allows a motherboards PCI bus system to be expanded by adding more buses to the system. PCI bridges can support multiple independent PCI buses.Historically, PCI bridges are part of the north bridge architecture of a computer motherboard. Their main role is to interface the PCI slots on the motherboard that are used for attachment to peripheral cards like graphics cards, network interface cards and WiFi cards. They also can provide the older ISA style card interfaces to support older motherboards and peripherals. PCI is a parallel bus architecture with a 32-bit data bus, but 64-bit versions are also available. Original releases operated at 33MHz, with subsequent bus releases supporting 66MHz. A server version offered speeds up to 533MHz (PCI-X 2.0). A PCI bridge will forward operations from one bus to another as is required. A variant of PCI called PCI express (PCIe) utilizes bridges for every card slot on a motherboard – making every peripheral appear to be a completely different bus system. Communication between buses in a bridge focuses around forwarding data transactions between buses. If a device on one bus tries to access memory space on another bus it must wait until the PCI Bridge signals the transaction is complete, which will mean that the data has been fetched or has been written to or from the other buses address space. Transactions can be queued in buffers on most PCI Bridges, where they undergo some prioritization scheme or arbitration. One such scheme is round robin, where each bus gets a turn to process a transaction if so required. In the case of writing data to another bus, this could be queued in the Bridge, and signaled to the originating bus master that it is completed. This is called a posted write, and can accelerate bus access. Bridges can also manipulate a data transfer by processes called collapsing, merging, and combining. This improves efficiency because many buses are optimized for bursting data in longer streams rather than as single bus words. 더 읽기 읽기 안 함