Analog DevicesAD4020BCPZ-RL7Analog to Digital Converters - ADCs
1-Channel Single ADC SAR 1.8Msps 20-bit Serial 10-Pin LFCSP EP T/R
The AD402x family from Analog Devices are high speed, low power, single-supply, precise, 20-bit ADCs based on a SAR architecture. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage.
The family has 3 different sampling rates and incorporates features that lower signal chain power, reduce signal chain complexity, and enable higher channel density.
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AD4020: 1.8 MSPS
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AD4021: 1.0 MSPS
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AD4022: 0.5 MSPS
Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs.
Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input over voltage clamp protects the ADC inputs against over voltage events, minimizing disturbances on the reference pin, and eliminating the need for external protection diodes.
Fast device throughput up to 1 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input/output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.
Applications
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• Automatic test equipment
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• Machine automation
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• Medical equipment
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• Battery-powered equipment
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• Precision data acquisition systems
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• Instrumentation and control systems
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Features and Benefits
- • Easy Drive
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• Greatly reduced input kickbackInput current reduced to 0.5 μA/MSPS
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• Enhanced acquisition phase, ≥77% of cycle time at 1 MSPS
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• First conversion accurate, no latency or pipeline delay
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• Input span compression for single-supply operation
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• Fast conversion allows low SPI clock rates
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• Input overvoltage clamp protection sinks up to 50 mA
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• SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface
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• High performance Differential analog input range: ±VREF, VREF from 2.4 V to 5.1 V
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• Throughput: 1 MSPS
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• INL: ±3.1 ppm maximum
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• Guaranteed 20-bit no missing codes
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• SNR: 100.5 dB at fIN = 1 kHz at VREF = 5 V
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• THD: −123 dB at fIN = 1 kHz, −100 dB at fIN = 100 kHz
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• SINAD: 89.5 dB at fIN = 500 kHz (see Figure 17)
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• Oversampled dynamic range104 dB for OSR = 2
131 dB for OSR = 1024 -
• Low power
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• Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface5.1 mW at 1 MSPS (VDD only)
83 μW at 10 kSPS, 8.3 mW at 1 MSPS (total power) -
• 10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOPPin compatible with AD4003/AD4007/AD4011 family
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• Guaranteed operation: −40°C to +125°C
Block Diagrams and Tables
Related Evaluation Board
| Compliant | |
| EAR99 | |
| Active | |
| 8542.39.00.30 | |
| Automotive | No |
| PPAP | No |
| Mounting | Surface Mount |
| Package Height | 0.73 |
| Package Width | 3 |
| Package Length | 3 |
| PCB changed | 10 |
| Standard Package Name | CSP |
| Supplier Package | LFCSP EP |
| 10 | |
| Lead Shape | No Lead |
| EDA / CAD Models |