| RoHS Not Applicable | |
| EAR99 | |
| Active | |
| 8473.30.11.80 | |
| SVHC | Yes |
| SVHC 기준 초과 | Yes |
| Automotive | No |
| PPAP | No |
Dev Kit Description
The CDCLVP2102 is a high-performance, low additive phase noise clock buffer. It has two universal input buffers that support either single-ended or differential clock inputs, and each input feeds a bank of two LVPECL outputs. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP2102. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP2102 device functionalities. For optimum performance, the board is equipped with 50-W SMA connectors and well-controlled, 50-W impedance microstrip transmission lines.
Dev Kit Features
-Easy-to-use evaluation board to fan out low phase noise clocks-Easy device setup-Fast configuration-Control pins configurable through jumpers-Board powered at +2.5-/+3.3-V-Single-ended or differential input clocks-CDCLVP2102 supports four LVPECL outputs; CDCLVP2102EVM supports two LVPECL outputsKit Includes
-SCAU033, CDCLVP2102 User's Guide-SCAS881, 4 LVPECL Output, High-Performance Clock BufferDev Kit Additional Information
Technical Document
http://www.ti.com/lit/ds/symlink/cdclvp1102.pdf
| EDA / CAD Models |