| ์ ๋ฝ ์ฐํฉ RoHS ๋ช
๋ น์ด | Compliant |
| ๋ฏธ๊ตญ์์ถํต์ ๋ถ๋ฅECCN ์ธ์ฝ๋ฉ | 3A001a.7.a. |
| ์นํ๊ฒฝ ๋ฌด์ฐ | NRND |
| ๋ฏธ๊ตญ ์ธ๊ด ์ํ ์ฝ๋ | 8542.31.00.60 |
| SVHC | Yes |
| SVHC ๊ธฐ์ค ์ด๊ณผ | Yes |
| Automotive | No |
| PPAP | No |
| Family Name | Cycloneยฎ III |
| User I/Os | 331 |
| Process Technology | 65nm |
| Number of I/O Banks | 8 |
| Operating Supply Voltage (V) | 1.2 |
| Logic Elements | 39600 |
| Number of Multipliers | 126 (18x18) |
| Program Memory Type | SRAM |
| Embedded Memory (Kbit) | 1134 |
| Total Number of Block RAM | 126 |
| IP Core | 10 Gigabit Ethernet MAC|32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz|SpeedView Enabled JPEG Encoder (SVE-JPEG-E)|V1 ColdFire|Viterbi Compiler, Low-Speed/Hybrid Serial Decoder |
| Provider Name | Altera/Freescale/CAST, Inc/MorethanIP/PLDA |
| Device Logic Units | 39600 |
| Number of Global Clocks | 20 |
| Device Number of DLLs/PLLs | 4 |
| Programmability | No |
| Reprogrammability Support | No |
| Copy Protection | Yes |
| In-System Programmability | No |
| Opr. Frequency (MHz) | 437.5 |
| Speed Grade | 7 |
| Differential I/O Standards | HSTL-12|HSTL-15|HSTL-18|LVDS|LVPECL|RSDS|SSTL-18|SSTL-2 |
| Single-Ended I/O Standards | HSTL|LVCMOS|LVTTL|PCI|PCI-X|SSTL |
| External Memory Interface | DDR2 SDRAM|QDRII+SRAM |
| Minimum Operating Supply Voltage (V) | 1.15 |
| Maximum Operating Supply Voltage (V) | 1.25 |
| I/O Voltage (V) | 1.2|1.5|1.8|2.5|3.3 |
| Minimum Operating Temperature (ยฐC) | -40 |
| Maximum Operating Temperature (ยฐC) | 100 |
| Supplier Temperature Grade | Industrial |
| Tradename | Cyclone |
| Mounting | Surface Mount |
| Package Height | 1.5 |
| Package Width | 19 |
| Package Length | 19 |
| PCB changed | 484 |
| Standard Package Name | BGA |
| Supplier Package | UBGA |
| Pin Count | 484 |
| Lead Shape | Ball |
