| 유럽 연합 RoHS 명령어 | Compliant with Exemption |
| 미국수출통제분류ECCN 인코딩 | 3A001a.7.a. |
| 친환경 무연 | Obsolete |
| 미국 세관 상품 코드 | 8542.31.00.60 |
| SVHC | Yes |
| SVHC 기준 초과 | Yes |
| Automotive | No |
| PPAP | No |
| Family Name | Stratix® IV GX |
| User I/Os | 904 |
| Process Technology | 40nm |
| Number of I/O Banks | 24 |
| Number of Registers | 424960 |
| Shift Registers | Utilize Memory |
| Operating Supply Voltage (V) | 0.9 |
| Logic Elements | 531200 |
| Number of Multipliers | 1024 (18x18) |
| Program Memory Type | SRAM |
| Embedded Memory (Kbit) | 27376 |
| Total Number of Block RAM | 64+1280 |
| EMACs | 1 |
| IP Core | SD/MMC SPI|UART|V-by-One HS|Viterbi Compiler, Low-Speed/Hybrid Serial Decoder |
| Provider Name | Altera/CAST, Inc/Bitec/Eureka Technology Inc/El Camino GmbH |
| SERDES Channels | 98 |
| Device Logic Units | 531200 |
| Number of Global Clocks | 16 |
| Device Number of DLLs/PLLs | 12 |
| Transceiver Channels | 48 |
| JTAG Support | Yes |
| Transceiver Speed (Gbps) | 8.5 |
| Dedicated DSP | 128 |
| PCIe | 4 |
| Programmability | Yes |
| Reprogrammability Support | No |
| Number of Look-up Table Input | 3/4 |
| Copy Protection | Yes |
| In-System Programmability | No |
| Speed Grade | 2 |
| Differential I/O Standards | LVDS|LVPECL |
| Single-Ended I/O Standards | LVCMOS|LVTTL |
| External Memory Interface | DDR2 SDRAM|DDR3 SDRAM|QDRII+SRAM|RLDRAM II |
| Minimum Operating Supply Voltage (V) | 0.87 |
| Maximum Operating Supply Voltage (V) | 0.93 |
| I/O Voltage (V) | 1.2|1.5|1.8|2.5|3 |
| Minimum Operating Temperature (°C) | 0 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Temperature Grade | Commercial |
| Packaging | Tray |
| Tradename | Stratix |
| Mounting | Surface Mount |
| Package Height | 2.8 |
| Package Width | 45 |
| Package Length | 45 |
| PCB changed | 1932 |
| Standard Package Name | BGA |
| Supplier Package | FC-FBGA |
| Pin Count | 1932 |
| Lead Shape | Ball |
