Altera/Intel Programmable SolutionsEP610PI-30Complex Programmable Logic Devices - CPLDs
CPLD Classic Family 300 Gates 16 Macro Cells 33.3MHz 5V 24-Pin PDIP
| Not Compliant | |
| EAR99 | |
| Obsolete | |
| SVHC | Yes |
| SVHC 기준 초과 | Yes |
| Classic | |
| EPROM | |
| 2 | |
| 16 | |
| 8 | |
| 300 | |
| No | |
| 22 | |
| No | |
| Yes | |
| Yes | |
| 45.45 | |
| 17 | |
| 30 | |
| 30 | |
| No | |
| 4.5 | |
| 5.5 | |
| 5 | |
| -40 | |
| 85 | |
| Industrial | |
| Classic |
| EDA / CAD Models |