Lattice SemiconductorGAL16V8D-25QPISimple Programmable Logic Devices - SPLDs
SPLD GAL Family 8 Macro Cells 41.6MHz 5V 20-Pin PDIP
| Not Compliant | |
| EAR99 | |
| Obsolete | |
| GAL | |
| 8 | |
| 8 | |
| Yes | |
| Yes | |
| No | |
| 41.6 | |
| 25 | |
| 25 | |
| 4.5 | |
| 5 | |
| 5.5 | |
| 65 | |
| -40 | |
| 85 | |
| Industrial | |
| GAL |
| EDA / CAD Models |
SPLD GAL Family 8 Macro Cells 41.6MHz 5V 20-Pin PDIP
| Not Compliant | |
| EAR99 | |
| Obsolete | |
| GAL | |
| 8 | |
| 8 | |
| Yes | |
| Yes | |
| No | |
| 41.6 | |
| 25 | |
| 25 | |
| 4.5 | |
| 5 | |
| 5.5 | |
| 65 | |
| -40 | |
| 85 | |
| Industrial | |
| GAL |
| EDA / CAD Models |