Lattice SemiconductorGAL20RA10B-20LP简单可编程逻辑器件
SPLD GAL Family 10 Macro Cells 41.7MHz 5V 24-Pin PDIP
| Not Compliant | |
| EAR99 | |
| Obsolete | |
| 8542330001 | |
| GAL | |
| 10 | |
| 10 | |
| 4 | |
| Yes | |
| Yes | |
| No | |
| 41.7(Min) | |
| 20 | |
| 20 | |
| 4.75 | |
| 5 | |
| 5.25 | |
| 100 | |
| 0 | |
| 75 | |
| Commercial | |
| GAL |
| EDA / CAD Models |
SPLD GAL Family 10 Macro Cells 41.7MHz 5V 24-Pin PDIP
| Not Compliant | |
| EAR99 | |
| Obsolete | |
| 8542330001 | |
| GAL | |
| 10 | |
| 10 | |
| 4 | |
| Yes | |
| Yes | |
| No | |
| 41.7(Min) | |
| 20 | |
| 20 | |
| 4.75 | |
| 5 | |
| 5.25 | |
| 100 | |
| 0 | |
| 75 | |
| Commercial | |
| GAL |
| EDA / CAD Models |