DRAM Module DDR2 SDRAM 1Gbyte 240DIMM
| 欧盟RoHS指令 | Supplier Unconfirmed |
| 美国出口管制分类ECCN编码 | EAR99 |
| 环保无铅 | Obsolete |
| Module | DRAM Module |
| Subcategory | DDR2 SDRAM |
| Module Density | 1Gbyte |
| Organization | 128Mx72 |
| Module Type | 240DIMM |
| Number of Chip per Module | 9 |
| Chip Density (bit) | 1G |
| Data Bus Width (bit) | 72 |
| Maximum Clock Rate (MHz) | 667 |
| Chip Configuration | 128Mx8 |
| Chip Package Type | FBGA |
| Minimum Operating Supply Voltage (V) | 1.7 |
| Typical Operating Supply Voltage (V) | 1.8 |
| Maximum Operating Supply Voltage (V) | 1.9 |
| Module Sides | Single |
| ECC Support | Yes |
| Number of Ranks | Single |
| CAS Latency | 5 |
| PLL | No |
| SPD EEPROM Support | No |
| Self Refresh | No |
| EDA / CAD Models |
|
A datasheet is only available for this product at this time.
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DRAM Module DDR2 SDRAM 1Gbyte 240DIMM
| 欧盟RoHS指令 | Supplier Unconfirmed |
| 美国出口管制分类ECCN编码 | EAR99 |
| 环保无铅 | Obsolete |
| Module | DRAM Module |
| Subcategory | DDR2 SDRAM |
| Module Density | 1Gbyte |
| Organization | 128Mx72 |
| Module Type | 240DIMM |
| Number of Chip per Module | 9 |
| Chip Density (bit) | 1G |
| Data Bus Width (bit) | 72 |
| Maximum Clock Rate (MHz) | 667 |
| Chip Configuration | 128Mx8 |
| Chip Package Type | FBGA |
| Minimum Operating Supply Voltage (V) | 1.7 |
| Typical Operating Supply Voltage (V) | 1.8 |
| Maximum Operating Supply Voltage (V) | 1.9 |
| Module Sides | Single |
| ECC Support | Yes |
| Number of Ranks | Single |
| CAS Latency | 5 |
| PLL | No |
| SPD EEPROM Support | No |
| Self Refresh | No |
| EDA / CAD Models |
A datasheet is only available for this product at this time.
制造商
