| EU RoHS | Compliant |
| ECCN (US) | EAR99 |
| Part Status | NRND |
| HTS | 8542.39.00.60 |
| SVHC | Yes |
| SVHC Exceeds Threshold | Yes |
| Automotive | No |
| PPAP | No |
| Family Name | Cyclone® II |
| User I/Os | 152 |
| Process Technology | 90nm |
| Number of I/O Banks | 8 |
| Shift Registers | Utilize Memory |
| Operating Supply Voltage (V) | 1.2 |
| Logic Elements | 18752 |
| Number of Multipliers | 26 (18x18) |
| Program Memory Type | SRAM |
| Embedded Memory (Kbit) | 234 |
| Total Number of Block RAM | 52 |
| IP Core | Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|V1 ColdFire|SpeedView Enabled JPEG Encoder (SVE-JPEG-E)|10 Gigabit Ethernet MAC| 32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz |
| Provider Name | Altera/Freescale/CAST, Inc/MorethanIP/PLDA |
| Device Logic Units | 18752 |
| Number of Global Clocks | 16 |
| Device Number of DLLs/PLLs | 4 |
| Programmability | No |
| Reprogrammability Support | No |
| Copy Protection | No |
| In-System Programmability | Yes |
| Opr. Frequency (MHz) | 402.58 |
| Speed Grade | 8 |
| Differential I/O Standards | LVDS|PCI-X |
| Single-Ended I/O Standards | LVDS|PCI-X |
| Maximum I/O Performance | 640Mbps |
| External Memory Interface | DDR SDRAM|QDR II+SRAM |
| Minimum Operating Supply Voltage (V) | 1.15 |
| Maximum Operating Supply Voltage (V) | 1.25 |
| I/O Voltage (V) | 1.5|1.8|2.5|3.3 |
| Minimum Operating Temperature (°C) | 0 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Temperature Grade | Commercial |
| Packaging | Tray |
| Tradename | Cyclone |
| Mounting | Surface Mount |
| Package Height | 1.05 mm |
| Package Width | 17 mm |
| Package Length | 17 mm |
| PCB changed | 256 |
| Standard Package Name | BGA |
| Supplier Package | FBGA |
| Pin Count | 256 |
| Lead Shape | Ball |
