NXP SemiconductorsMSC8156ADS組み込みシステム開発ボードおよびキット

The MSC8156 application development system (MSC8156ADS) is a complete debugging environment intended for engineers developing applications for the MSC8156, MSC8154, MSC8256, MSC8254, MSC8252, and MSC8251 Freescale digital signal processors (DSPs). The MSC815x and MSC825x family of DSPs are highly integrated DSP processors that contain one, two, four, or six StarCore SC3850 DSP subsystems ranging from 8 GMACS to 48 GMACs with each DSP core running up to 1 GHz. These devices target high-bandwidth, highly computational DSP applications such as 3GPP, TD-SCDMA, 3G-LTE, and WiMAX base station applications as well as medical imaging, aerospace, defense, video, voice, and advanced test and measurement.

The MSC8156ADS is intended to serve as a platform for software and hardware development in processor environments using the MSC815x and MSC825x family of DSPs. Onboard resources and the associated debugger enable developers to perform a variety of tasks, including:

• Download and run code
• Set breakpoints
• Display memory and registers
• Connect proprietary hardware via an expansion connector

• Supports application development for the MSC815x and MSC825x DSPs
• The first DDR controller (DDRC1) is configured in DDR2 mode: 200-pin SOCDIMM with ECC support, 64-bit @ 800 Mbps, 1 GB of memory
• The second DDR controller (DDRC2) is configured in DDR3 mode: 204-pin SODIMM, 64-bit @ 800 Mbps, No-ECC, 1 GB of memory
• The DSP RGMII (at ports GE1 and GE2) connects to two single Marvell® 88E1111 GETH PHYs for regular board configuration
• A Marvell 10-port SGMII switch 88E6182 links the MSC8156 SGMII lines to 2xRJ-45 copper connectors and to the 1000Base-X over AMC MicroTCA connector ports 0 and 2
• A Pericom® PI2DBS212ZHE Differential Signal switch supports multiplexing of the programmable SerDes lines to the AMC edge connector or to the SGMII switch
• Two Dallas E1/T1 framers connect to the four DSP TDM ports
• P1 and P3 connectors carry the DSP GPIO and TDM signals
• A DIP switch array and associated FPGA supports the DSP configuration and boot support at reset. A number of boot options are supported including: boot from a large (64 KB) or small (1 KB) I2C EEPROM, boot from serial 8 MB SPI flash, boot from communications ports (from SerDes Serial RapidIO interface or from Ethernet SGMII or RGMII ports)
• Two available debug interfaces, including onboard USB TAP controller (eUTAP) or OnCE 14-pin header for any external TAP controller
• FPGA logic: board control and status register (BCSR) that controls configuratino of the JTAG and interface controller resources and status LEDs
• The MSC8156ADS supports two working configurations:
  • Stand-alone mode: The MSC8156ADS can run in a stand-alone mode like other application development systems, with direct connections to debuggers, power supply and other external connections
  • AMC Mode: The MSC8156ADS is inserted in a standard MicroTCA® backplane that allows testing of the high-speed Serial RapidIO® and PCI Express® ports against other platforms