Lattice SemiconductorGAL20RA10B-15LPSimple Programmable Logic Devices - SPLDs
SPLD GAL Family 10 Macro Cells 50MHz 5V 24-Pin PDIP
| Not Compliant | |
| EAR99 | |
| Obsolete | |
| 8542.39.00.01 | |
| SVHC | Yes |
| SVHC 기준 초과 | Yes |
| Automotive | No |
| PPAP | No |
| GAL | |
| 10 | |
| 10 | |
| 4 | |
| Yes | |
| Yes | |
| No | |
| 50(Min) | |
| 15 | |
| 15 | |
| 4.75 | |
| 5 | |
| 5.25 | |
| 100 | |
| 0 | |
| 75 | |
| Commercial | |
| GAL | |
| Mounting | Through Hole |
| Package Height | 3.3 |
| Package Width | 6.35 |
| Package Length | 31.75 |
| PCB changed | 24 |
| Standard Package Name | DIP |
| Supplier Package | PDIP |
| 24 | |
| Lead Shape | Through Hole |
| EDA / CAD Models |