Latch Transparent 3-ST 8-CH D-Type 20-Pin SOIC W T/R
| ์ ๋ฝ ์ฐํฉ RoHS ๋ช ๋ น์ด | Compliant |
| ๋ฏธ๊ตญ์์ถํต์ ๋ถ๋ฅECCN ์ธ์ฝ๋ฉ | EAR99 |
| ์นํ๊ฒฝ ๋ฌด์ฐ | Active |
| ๋ฏธ๊ตญ ์ธ๊ด ์ํ ์ฝ๋ | 8542.39.00.60 |
| Automotive | No |
| PPAP | No |
| Type | D-Type |
| Logic Family | HCT |
| Latch Mode | Transparent |
| Number of Channels per Chip | 8 |
| Number of Elements per Chip | 1 |
| Number of Inputs per Chip | 8 |
| Number of Input Enables per Element | 1 |
| Number of Selection Inputs per Element | 0 |
| Number of Outputs per Chip | 8 |
| Number of Output Enables per Element | 1 |
| Bus Hold | No |
| Set/Reset | No |
| Polarity | Non-Inverting |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 40@5V |
| Absolute Propagation Delay Time (ns) | 56 |
| Process Technology | CMOS |
| Output Type | 3-State |
| Maximum Low Level Output Current (mA) | 7.2 |
| Maximum High Level Output Current (mA) | -7.2 |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Maximum Quiescent Current (uA) | 1000 |
| Propagation Delay Test Condition (pF) | 150 |
| Minimum Operating Temperature (ยฐC) | -40 |
| Maximum Operating Temperature (ยฐC) | 85 |
| Packaging | Tape and Reel |
| Mounting | Surface Mount |
| Package Height | 2.34(Max) |
| Package Width | 7.5 |
| Package Length | 12.8 |
| PCB changed | 20 |
| Standard Package Name | SO |
| Supplier Package | SOIC W |
| Pin Count | 20 |
| Lead Shape | Gull-wing |
| EDA / CAD Models |
๋ฌธ์ ๋ฐ ์ง์
ํ๋ก๊ทธ๋จ ๋ฐ ํํธ๋
์ฃผ์ ์ ํ
์ ํ ์นดํ ๊ณ ๋ฆฌ
์ ์กฐ์ ์ฒด
์์ง ์์ฅ ๋ฐ ๋ํฅ
Latch Transparent 3-ST 8-CH D-Type 20-Pin SOIC W T/R
| ์ ๋ฝ ์ฐํฉ RoHS ๋ช ๋ น์ด | Compliant |
| ๋ฏธ๊ตญ์์ถํต์ ๋ถ๋ฅECCN ์ธ์ฝ๋ฉ | EAR99 |
| ์นํ๊ฒฝ ๋ฌด์ฐ | Active |
| ๋ฏธ๊ตญ ์ธ๊ด ์ํ ์ฝ๋ | 8542.39.00.60 |
| Automotive | No |
| PPAP | No |
| Type | D-Type |
| Logic Family | HCT |
| Latch Mode | Transparent |
| Number of Channels per Chip | 8 |
| Number of Elements per Chip | 1 |
| Number of Inputs per Chip | 8 |
| Number of Input Enables per Element | 1 |
| Number of Selection Inputs per Element | 0 |
| Number of Outputs per Chip | 8 |
| Number of Output Enables per Element | 1 |
| Bus Hold | No |
| Set/Reset | No |
| Polarity | Non-Inverting |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 40@5V |
| Absolute Propagation Delay Time (ns) | 56 |
| Process Technology | CMOS |
| Output Type | 3-State |
| Maximum Low Level Output Current (mA) | 7.2 |
| Maximum High Level Output Current (mA) | -7.2 |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Maximum Quiescent Current (uA) | 1000 |
| Propagation Delay Test Condition (pF) | 150 |
| Minimum Operating Temperature (ยฐC) | -40 |
| Maximum Operating Temperature (ยฐC) | 85 |
| Packaging | Tape and Reel |
| Mounting | Surface Mount |
| Package Height | 2.34(Max) |
| Package Width | 7.5 |
| Package Length | 12.8 |
| PCB changed | 20 |
| Standard Package Name | SO |
| Supplier Package | SOIC W |
| Pin Count | 20 |
| Lead Shape | Gull-wing |
| EDA / CAD Models |
๋ฌธ์ ๋ฐ ์ง์
ํ๋ก๊ทธ๋จ ๋ฐ ํํธ๋
์ฃผ์ ์ ํ
์ ํ ์นดํ ๊ณ ๋ฆฌ
์ ์กฐ์ ์ฒด
์์ง ์์ฅ ๋ฐ ๋ํฅ
