Any-Frequency Jitter Attenuating Clock
Download the ClockBuilder Pro Software from Silicon Labs here. The ClockBuilder Pro is designed to simplify clock tree design design and device configuration.
| 欧盟RoHS指令 | Compliant |
| 美国出口管制分类ECCN编码 | EAR99 |
| 环保无铅 | NRND |
| 美国海关商品代码 | 8542330001 |
| Number of Outputs per Chip | 2 |
| Clock Input Frequency (MHz) | 10 to 710 |
| Maximum Output Frequency (MHz) | 346 |
| Typical Duty Cycle (%) | 60(Max) |
| Output Logic Level | CML|CMOS|LVDS|LVPECL |
| Minimum Operating Supply Voltage (V) | 1.71 |
| Typical Operating Supply Voltage (V) | 1.8|2.5|3.3 |
| Maximum Operating Supply Voltage (V) | 3.63 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Temperature Grade | Industrial |
| Packaging | Tray |
| EDA / CAD Models |
|
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Any-Frequency Jitter Attenuating Clock
Download the ClockBuilder Pro Software from Silicon Labs here. The ClockBuilder Pro is designed to simplify clock tree design design and device configuration.
| 欧盟RoHS指令 | Compliant |
| 美国出口管制分类ECCN编码 | EAR99 |
| 环保无铅 | NRND |
| 美国海关商品代码 | 8542330001 |
| Number of Outputs per Chip | 2 |
| Clock Input Frequency (MHz) | 10 to 710 |
| Maximum Output Frequency (MHz) | 346 |
| Typical Duty Cycle (%) | 60(Max) |
| Output Logic Level | CML|CMOS|LVDS|LVPECL |
| Minimum Operating Supply Voltage (V) | 1.71 |
| Typical Operating Supply Voltage (V) | 1.8|2.5|3.3 |
| Maximum Operating Supply Voltage (V) | 3.63 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Temperature Grade | Industrial |
| Packaging | Tray |
| EDA / CAD Models |
A datasheet is only available for this product at this time.
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