| 欧州RoHS | Compliant |
| ECCN (US) | 3A991d.1. |
| Part Status | Active |
| HTS | 8542.31.00.60 |
| SVHC | Yes |
| SVHC Exceeds Threshold | Yes |
| Automotive | No |
| PPAP | No |
| Family Name | Cyclone® IV E |
| User I/Os | 324 |
| Process Technology | 60nm |
| Number of I/O Banks | 8 |
| Operating Supply Voltage (V) | 1.2 |
| Logic Elements | 55856 |
| Number of Multipliers | 154 (18x18) |
| Program Memory Type | SRAM |
| Embedded Memory (Kbit) | 2340 |
| Total Number of Block RAM | 260 |
| IP Core | DS1/E1 TDM over Packet IP core|EtherCAT|EtherNET/IP|RapidIO to AXI Bridge Controller (RAB)|Sub-frame Latency JPEG 2000 Encoder (BA130) |
| Provider Name | Barco Silex/Mobiveil, Inc/Beckhoff Automation GmbH/Softing AG/Aimvalley |
| Device Logic Units | 55856 |
| Number of Global Clocks | 20 |
| Device Number of DLLs/PLLs | 4 |
| Dedicated DSP | 154 |
| PCIe | 1 |
| Programmability | Yes |
| Reprogrammability Support | No |
| Copy Protection | No |
| In-System Programmability | No |
| Speed Grade | 7 |
| Differential I/O Standards | B-LVDS|HSTL|LVDS|LVPECL|RSDS|SSTL |
| Single-Ended I/O Standards | HSTL|LVCMOS|LVTTL|PCI|PCI-X|SSTL |
| External Memory Interface | DDR SDRAM|DDR2 SDRAM|QDRII+SRAM |
| Minimum Operating Supply Voltage (V) | 1.16 |
| Maximum Operating Supply Voltage (V) | 1.24 |
| I/O Voltage (V) | 1.2|1.5|1.8|2.5|3|3.3 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 100 |
| Supplier Temperature Grade | Industrial |
| Tradename | Cyclone |
| Mounting | Surface Mount |
| Package Height | 1.5 |
| Package Width | 19 |
| Package Length | 19 |
| PCB changed | 484 |
| Standard Package Name | BGA |
| Supplier Package | UBGA |
| Pin Count | 484 |
| Lead Shape | Ball |
