High Accuracy SAR ADCs for Precision Measurement and Fast Signal Tracking

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Today the precision analog to digital converter (ADC) market is served primarily by delta sigma ADCs due to their high dynamic range, precision DC performance, and reasonable pricing. A delta-sigma ADC, by design, oversamples the input signal using a delta-sigma modulator followed by a digital decimation filter, resulting in low noise, but slow output data rates. An additional benefit of the oversampling is that the external analog anti-aliasing filter can be greatly simplified, relying on the digital filter to determine frequency response in the passband.

Analog Devices' Power by Linear's modern SAR ADC technology brings higher performance to precision applications, rivaling the best delta-sigma ADCs in terms of DC specifications (INL, DNL, offset, gain error, and stability) while maintaining high sample rates and no-latency operation. Fast sampling SAR ADCs are often used to oversample low bandwidth signals. Traditional oversampling allows the use of a decimation filter (low-pass filter + down-sampling), which increases the dynamic range of the system. Another benefit of oversampling is the relaxed requirements on the analog anti-aliasing filter. In the absence of oversampling, the analog anti-aliasing filter is required to have a steep roll-off (sharp transition band), thereby increasing its complexity. Alternatively, oversampling allows the use of a simple low-order analog filter in combination with a digital filter to create a mixed-mode equivalent anti-aliasing filter with a very steep roll-off. However the penalty is that the burden of this filtering task is placed on the host processor, and requires a faster processor to acquire the data at a much faster rate from the ADC output.

For these reasons, Analog Devices' Power by Linear is approaching the precision market differently; blending the high accuracy and speed of their proprietary SAR ADC architecture with integrated digital filters. The latest products are the LTC2508-32 and LTC2512-24. The LTC2508-32 is a 32-bit 1Msps SAR ADC with an integrated, pin-configurable digital filter optimized for low-bandwidth, precision applications. The LTC2512-24 is a 24-bit, 1.6Msps SAR ADC with integrated filter optimized for higher bandwidth applications. The LTC2508-32 achieves an impressive 145dB dynamic range at the slowest output rate of 61sps, while the LTC2512-24 targets 117dB at 50ksps output rate.

관련 상품 참조

LTC2508CDKD-32#PBF

Analog Devices Analog to Digital Converters - ADCs 보기

관련 상품 참조

LTC2512IDKD-24#PBF

Analog Devices Analog to Digital Converters - ADCs 보기

A key aspect of delta-sigma ADCs is that the output of the modulator is not directly usable. That is, it is a low resolution signal with shaped quantization noise and very low SNR. Various techniques are used to shape a delta-sigma modulator’s quantization noise, pushing it to a higher frequency where it is more easily filtered, with signals of interest occupying lower frequencies in the filter’s passband. The output of the modulator is then low-pass filtered to produce usable conversion results. However, by the sheer nature of its architecture, a delta-sigma modulator suffers from spurious tones in its output spectrum. Try as they may, spurious tones from the modulator can (and do) make an appearance in the passband.

Trying to search for a small signal can be nearly impossible in the presence of these spurs. Successive approximation register (SAR) ADCs do not suffer from this shortcoming, and have a near ideal white noise power spectrum. This would make SAR ADCs a better choice for detecting tones or vibrations at incredibly low energy levels. However, many SAR ADCs still suffer from discontinuities in the DC transfer function at the 16- to 18-bit level, thereby compromising DC performance.

The LTC2508-32 and LTC2512-24 have well-behaved linearity characteristics, with zero missing codes. This allows applications to take full advantage of the tremendous dynamic range of the filtered output data.

관련 상품 참조

LTC2508IDKD-32#PBF

Analog Devices Analog to Digital Converters - ADCs 보기

관련 상품 참조

LTC2512CDKD-24#PBF

Analog Devices Analog to Digital Converters - ADCs 보기

With a noise spectral density of only 22nVRMS/√Hz, the LTC2508-32 offers the lowest noise performance of any competitive ADC solution at 24-bit or 32-bit resolution (Figure 1). Unlike a delta-sigma modulator output, the output of this Analog Devices' Power by Linear SAR converter has a flat noise power spectral density, with no tones to contend with. This means that the digital filter can be designed arbitrarily for the end application’s requirements, rather than to filter modulator noise and tones. The LTC2508-32 filter is a “spread-sinc” architecture, representing a carefully chosen balance between stopband rejection, and settling time. The LTC2512-24 digital filter has a “no compromises” 0.001dB passband flatness extending to fo/4 (half a Nyquist zone). The LTC2512-24 filter transition zone and stopband attenuation are less aggressive than many delta sigma filters, allowing for faster settling and smaller time-domain artifacts. Once again, it is the absence of tones that makes such a filter practical.

The LTC2508-32 offers 4 pin-selectable decimation filters, with their properties listed in Table 1. The four different decimation filters allow designers to trade off between noise and bandwidth depending on the choice of application. For each configuration of the LTC2508-32, the digital filter is a low-pass finite impulse response (FIR) filter with linear phase response. The output of the digital filter is then down-sampled by the corresponding down-sampling factor (DF). Therefore, the resulting output data rate (fO) is equal to fSMPL/DF. In each of the decimation filter choices, the -3dB bandwidth is inversely proportional to the selected DF value. Each configuration provides a minimum of 80dB attenuation for frequencies in the range of fO /2 and fSMPL – fO /2. For every 4x increase in the down-sampling factor, the ADC dynamic range increases by approximately 6dB, resulting in a dynamic range from 131dB at DF=256, up to 145dB at DF=16384. This is equivalent to an effective number of bits (ENOB) of 24 bits. Note that it is important that the ADC result is limited by a quality noise process, i.e., thermal noise, not its quantization noise.  This means that the ADC should provide at least a few bits more than the ENOB, and with a 32-bit output word, the LTC2508-32 provides a sufficient number of bits to represent the filtered data using an integer number of bytes.

Table 1: Properties of Filters in LTC2508-32

0217 High Accuracy SAR ADCs Table 1

The output of the LTC2508-32 is always fully settled in 10 output samples, regardless of DF. As down-sampling factor is increased, bandwidth is decreased, limiting the noise and subsequently increasing dynamic range.  With a down-sampling factor of 256, the -3dB bandwidth of the filtered output is 480Hz, resulting in an output data rate of 3906sps. At the highest DF of 16384, the -3dB bandwidth is a narrow 7.5Hz, providing the highest filtering of the noise, and resulting in the slowest output data rate of 61sps. 

0217 High Accuracy SAR ADCs Image 1

Figure 1: Step Response of the LTC2508-32

In addition, the LTC2508 offers dual data output streams, the 32-bit digitally filtered version of the input signal, and a no-latency, 22-bit composite output directly from the front-end SAR converter. The no-latency output word consists of a 14-bit code representing the differential input, and an 8-bit code representing the input common mode voltage. The no-latency output is particularly useful in control applications, for fast tracking of the input signal and providing immediate feedback for changing load conditions. It can also be used to monitor the quality of the incoming signal and indicate system faults, for example, by detecting excessively noisy or oscillating signals that may be hidden by the digital filter. This information can be used in combination with the 8-bit common mode value for predictive maintenance.  Changes in common mode voltage may point to trouble upstream, leading to potential equipment failure. To the designer, this looks like two ADCs in one, offering perfectly matched representations of the input signal that are not subject to issues of mismatch or drift.

The LTC2512-24 offers many similarities to the LTC2508-32, with 4 pin-selectable decimation filters, as shown in Table 2. Figure 2 shows the amplitude response of the digital filter from DC to fO, the output data rate. Downsampling factors from 4 up to 32 are supported, resulting in a 3dB improvement in dynamic range for every 2x increase in downsampling factor. The LTC2512-24 has the same 22-bit composite code output, providing an almost ideal real time representation of the input signal. For the LTC2512-24, the output is always fully settled in 35 outputs samples.

Table 2. Properties of Filters in LTC2512-24

0217 High Accuracy SAR ADCs Table 2

0217 High Accuracy SAR ABCs Image 2

Figure 2: Magnitude of Frequency Response of the LTC2512-24 Digital Filter. fO = fSMPL/ DF

The LTC2508-32 is a great candidate for seismology applications and oil and gas exploration, where the ADC must resolve extremely low level signals buried in noise. The wider bandwidth and flat passband of the LTC2512-24 may be more suitable for medical instruments such as EKGs, which benefit from the high dynamic range of the filtered output, while utilizing the no latency output for real time information such as probe location. These ADCs are ideal for any precision application utilizing a control loop that must react quickly to changes in the input signal which would not be immediately visible via the slower, filtered output. More information on this family is available at arrow.com

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