NB6N14SMNGEVB, Clock/Data Receiver Evaluation Board
使用 onsemi 的 NB6N14SMNG 的参考设计
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依据最终产品
- Backplane Distributed Power
- Clock Management and Distribution
说明
- NB6N14SMNGEVB, Clock/Data Receiver Evaluation Board. The NB6N14S is a differential 1:4 Clock or Data Receiver and will accept Any Level input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and four identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB6N14S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6N14S has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6N14S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350mV typical LVDS output levels
主要特色
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Operating Frequency2000 MHz
Featured Parts (1)
零件编号 | 供应商 | 类别 | 说明 | |||
---|---|---|---|---|---|---|
|
NB6N14SMNG | onsemi | Clock Buffers and Drivers | Clock Fanout Buffer 4-OUT 1-IN 1:4 16-Pin QFN EP Tube | 买入 |