The range of field-programmable devices available on the market today is exponentially larger than it was even a few years ago. The resultant alphabet soup of acronyms and overlap of appropriate applications is enough to send any designer running for their favorite microcontroller.
Field Programmable Devices (FPD) or Programmable Logic Devices (PLD) differ from standard microcontrollers in that programming an FPD actually changes the hardware of the device. A microcontroller can be told to execute a program systematically, one instruction at a time. The speed of execution is typically controlled by an internal or external clock, and the device performs one instruction per clock cycle. For normal, slow-signal applications, this system is fine. However, if the application demands simultaneous I/O reading and/or high speed signal processing, the device needs to have dedicated hardware paths. With an FPD, these hardware paths can be defined and created by the user through a programming interface. These devices require non-volatile memory such as flash or NVRAM to keep their configurations even through loss of power.
Simple Programmable Logic Device (SPLD)
For applications that only require a small number of I/Os be handled simultaneously, an SPLD may suffice. Typically composed of only a dozen or so macrocells, these devices are typically the smallest, cheapest, and least power-hungry of the FPDs. The popular ATF16xV8 family from Atmel has parts with 8 macrocells that consume less than 250mW at peak power, in packages as small as 4x6mm. The line blurs between SPLDs and specialized programmable logic like programmable logic arrays (PLA or PAL) that are often used to perform similar functions.
Complex Programmable Logic Device (CPLD)
When your application definitely calls for a programmable device but you really only need between 32 and 1000 or so macrocells, a CPLD is your answer. These devices typically feature a higher input to logic gate ratio, making them ideal for applications that require large numbers of simultaneous I/O, but a relatively low amount of data processing. CPLDs are denser than SPLDs and offer increased abilities in small packages. The Flash370 family from Cypress has devices providing between 32 and 128 macrocells in a 14x14mm package. While SPLDs tend to operate at 5V, CPLDs behave more like FPGAs and typically require lower voltages at higher currents. Most commonly, CPLDs will draw up to 50mA per I/O line from a 1.8V or 3.3V supply.
Field Programmable Gate Array (FPGA)
FPGAs are the current titans of the FPD world, providing brain power to everything from server blades to life-saving robots. This category covers a large range of prices, abilities, and sizes. The LatticeEC family from Lattice Semiconductor offers 130nm technology solutions with a few thousand cells in a 20x20mm package for under $10USD. At the other end of the spectrum, Altera’s Stratix V family uses 28nm technology to create devices optimized for bandwidth-centric and data-intensive applications. These range in cost from a few hundred to several thousand dollars, and often require very precise power management systems to deliver the high-current, low-voltage rails needed for operation. Reference designs are available for guidance on how to approach supplying core (0.9V at up to 68A) and I/O power rails with appropriate sequencing to avoid damage to the device. The stringent power and thermal management required to safely operate a high performance FPGA can be intimidating, but the abilities of the devices simply cannot be matched by anything else on the market today.
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