EV-ADF4112SD1Z, Evaluation Board for Evaluating the ADF4112 Single, Integer-N 3-GHz PPL with Programmable Prescaler and Charge Pump

Analog Devices の部品 ADF4112BRUZ を使用したリファレンス デザイン

メーカー

Analog Devices
  • アプリケーションカテゴリ
    時計とタイミング
  • 製品タイプ
    PLLクロックジェネレータ

最終製品向け

  • Basestation
  • Radar System
  • Satellite
  • Test Equipment
  • Wireless LAN

説明

  • EV-ADF4112SD1Z, Evaluation Board for Evaluating the ADF4112 Single, Integer-N 3-GHz PPL with Programmable Prescaler and Charge Pump. The SDP-S controller board allows software programming of the frequency synthesizer. It shows the board, which contains footprints for a frequency synthesizer, the power supplies, a TCXO reference and an RF output. There are also footprints for the passive PLL loop filter components, a VCO and an external reference SM input. Prior to evaluation setup, the ADF41xxBRUZ, T-package VCO and loop filter components should be inserted on the board

主な特徴

  • Output Frequency
    5800 MHz

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