CDCLVD1204EVM, Low-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board
使用 Texas Instruments 的 CDCLVD1204RGT 的参考设计
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依据最终产品
- Clock and Timing Devices
- Communications and Telecom
- Medical Imaging
- Optical Networking
- Test Equipment
- Wireless Communications Tester
说明
- CDCLVD1204EVM, Low-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board. The CDCLVD1204 is high-performance, low-additive jitter clock buffers. They have two universal input buffers that support single-ended or differential clock inputs and are selectable through a control pin. The devices also feature on-chip bias generators that can provide the LVDS common-mode voltage to the device inputs. The evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVD1204
主要特色
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Operating Frequency200 MHz
Featured Parts (2)
| 零件编号 | 供应商 | 类别 | 说明 | |||
|---|---|---|---|---|---|---|
|
CDCLVD1204RGTT | Texas Instruments | Clock Buffers and Drivers | Clock Fanout Buffer 4-OUT 2-IN 2:4 16-Pin VQFN EP T/R | 买入 | |
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CDCLVD1204RGTR | Texas Instruments | Clock Buffers and Drivers | Clock Fanout Buffer 4-OUT 2-IN 1:4 16-Pin VQFN EP T/R | 买入 | |