SN65HVD101EVM, Evaluation Module for the SN65HVD102 IO-Link Device Transceiver

使用 Texas Instruments 的 SN65HVD102R 的参考设计

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SN65HVD101EVM Image
SN65HVD102 Schematic
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供应商

Texas Instruments
  • 应用类别
    界面
  • 产品类别
    IO-Link Interface
买入

依据最终产品

  • Communications and Telecom
  • Industrial
  • Telecom Infrastructure

说明

  • SN65HVD101EVM, Evaluation Module helps designers to evaluate the SN65HVD102 IO-Link Device Transceiver. The SN65HVD10x IO-LINK PHYs implement the IO-LINK interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the device will respond to communication initiated by the master. These PHY devices will exchange data with the Master node, acting as a complete physical layer for bi-directional communication. The SN65HVD102 operates from an external 3.3V or 5V local supply connected to VCC_IN and GND on TB2

主要特色

  • Interface Standards
    I/O
  • Supply Voltage
    Single(9 to 36) V
  • Functions
    Line Transmitter

Featured Parts (2)

Featured Parts
零件编号 供应商 类别 说明
SN65HVD102RGBR Texas Instruments PHY PHY 1-CH 3.3V/5V 20-Pin VQFN EP T/R 买入
SN65HVD102RGBT Texas Instruments PHY PHY 1-CH 3.3V/5V 20-Pin VQFN EP T/R 买入

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