NB6L611MNGEVB, Clock/Data Input Evaluation Board
onsemi이 부품 NB6L611MNG 을 사용하는 참조 설계
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최종 제품의 경우
- Backplane Distributed Power
- Clock Management and Distribution
Description
- NB6L611MNGEVB, Clock/Data Input Evaluation Board. The NB6L611 is a differential 1:2 clock or data fan-out buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VTD pins and will accept LVPECL, CML, LVDS, LVCMOS or LVTTL logic levels. The VREFAC pin is an internally generated voltage supply available to this device only. VREFAC is used as a reference voltage for single-ended PECL or NECL inputs. for all single ended input conditions, the unused complementary differential input is connected to VREFAC as a switching reference voltage
피쳐링 부품 (1)
| 부품 번호 | Manufacturer | Type | Description | |||
|---|---|---|---|---|---|---|
|
NB6L611MNG | onsemi | Clock Buffers and Drivers | Clock Fanout Buffer 2-OUT 1-IN 1:2 16-Pin QFN EP Tube | 구매 | |