NB6L611MNGEVB, Clock/Data Input Evaluation Board

使用 onsemi 的 NB6L611MNG 的参考设计

放大
NB6L611MNGEVB Image
NB6L611MNGEVB Block Diagram
Image 1 / 2

供应商

onsemi
  • 应用类别
    时钟和计时
  • 产品类别
    时钟缓冲器
买入

依据最终产品

  • Backplane Distributed Power
  • Clock Management and Distribution

说明

  • NB6L611MNGEVB, Clock/Data Input Evaluation Board. The NB6L611 is a differential 1:2 clock or data fan-out buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VTD pins and will accept LVPECL, CML, LVDS, LVCMOS or LVTTL logic levels. The VREFAC pin is an internally generated voltage supply available to this device only. VREFAC is used as a reference voltage for single-ended PECL or NECL inputs. for all single ended input conditions, the unused complementary differential input is connected to VREFAC as a switching reference voltage

Featured Parts (1)

Featured Parts
零件编号 供应商 类别 说明
NB6L611MNG onsemi Clock Buffers and Drivers Clock Fanout Buffer 2-OUT 1-IN 1:2 16-Pin QFN EP Tube 买入

Research and Events

Power the future with Silicon Carbide Technology

Join us for this one-day seminar, focused on Silicon Carbide Technology, which provides the needed flexibility for future Industrial and Automotive Power designs. Your designs will become smaller and more efficient with reduced costs.

Battery Management Systems Webinars

Battery Management Systems Webinars

Sorry, your filter selection returned no results.

与电子元件连接

Facebook LinkedIn Instagram YouTube
联系我们

联系与支持

项目和合作伙伴

新产品

产品类别

制造商

垂直领域与趋势

请仔细阅读我们近期更改的隐私政策。当按下确认键时，您已了解并同意艾睿电子的隐私政策和用户协议。

请参阅短策略

本网站需使用cookies以改善用户您的体验并进一步改进我们的网站。此处阅读了解关于网站cookies的使用以及如何禁用cookies。网页cookies和追踪功能或許用于市场分析。当您按下同意按钮，您已经了解并同意在您的设备上接受cookies，并给予网站追踪权限。更多关于如何取消网站cookies及追踪的信息，请点击下方“阅读更多”。尽管同意启用cookies追踪与否取决用户意愿，取消网页cookies及追踪可能导致网站运作或显示异常，亦或导致相关推荐广告减少。

我们尊重您的隐私。请在此阅读我们的隐私政策。