Aptina HiSPi to Parallel Sensor Bridge Reference Design using the LatticeMachXO2-1200 CPLD

Lattice Semiconductor の部品 LCMXO2-1200 を使用したリファレンス デザイン

メーカー

Lattice Semiconductor
  • アプリケーションカテゴリ
    センサーとトランスデューサー
  • 製品タイプ
    イメージセンサー

最終製品向け

  • Automotive and Transportation
  • Security
  • Video and Imaging

説明

  • Aptina HiSPi to Parallel Sensor Bridge Reference Design. To support higher bandwidth sensors, Aptina Imaging has introduced a high-speed serial interface called HiSPi. The HiSPi interface can operate from one to four lanes of serial data, plus one clock lane. Each signal is differential and can run at speeds up to 700 Mbps. To interface to an ISP with a traditional parallel bus, Lattice has created a bridge from HiSPi to a parallel format. The LatticeXP2-5 or LatticeMachXO2-1200 non-volatile FPGA provides an efficient and cost-effective solution for HiSPi-to-parallel bridging

We've updated our privacy policy. Please take a moment to review these changes. By clicking I Agree to Arrow Electronics Terms Of Use  and have read and understand the Privacy Policy and Cookie Policy.

Our website places cookies on your device to improve your experience and to improve our site. Read more about the cookies we use and how to disable them here. Cookies and tracking technologies may be used for marketing purposes.
By clicking “Accept”, you are consenting to placement of cookies on your device and to our use of tracking technologies. Click “Read More” below for more information and instructions on how to disable cookies and tracking technologies. While acceptance of cookies and tracking technologies is voluntary, disabling them may result in the website not working properly, and certain advertisements may be less relevant to you.
We respect your privacy. Read our privacy policy here