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| N° de référence | Prix | Stock | Fabricant | Catégorie | Description | Typical Operating Supply Voltage - (V) | Program Memory Type | Maximum Number of SERDES Channels | Single-Ended I/O Standards Supported | Maximum Number of User I/Os Range | Minimum Operating Supply Voltage - (V) | Differential I/O Standards Supported | Dedicated DSP | Total Number of Block RAM | Tradename | Supplier Package | Number of I/O Banks | Supported IP Core Manufacture | Family Name | Number of Look-up Table Input | Transceiver Speed - (Gbps) | External Memory Interface | Package Family Name | Maximum Power Dissipation - (mW) | Maximum Propagation Delay Time - (ns) | RAM Bits - (Kbit) | Number of Inter Dielectric Layers | Minimum Operating Temperature - (°C) | In-System Programmability | Device System Gates | Device System Gates Range | ROHS | Reprogrammability Support | Pin Count | Transceiver Blocks | Life Cycle | Ethernet MACs | Packaging | JTAG Support - (-) | Number of Registers | Speed Grade | Maximum Operating Supply Voltage - (V) | Supported IP Core | Programmability | Giga Multiply Accumulates per Second | Tolerant Configuration Interface Voltage - (V) | Maximum Internal Frequency - (MHz) | Maximum Number of User I/Os | Number of Global Clocks | PCI Blocks | Process Technology | Device Number of DLLs/PLLs | Number of Multipliers | Processor Blocks | Maximum Operating Temperature - (°C) | Device Logic Cells | I/O Voltage - (V) |
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Fiche technique pour 1 produit: Afficher
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Divers
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Aerotenna | FPGA | FPGA Artix-7 Family 28000 Cells 5V Bubble | Flash | 100 to 125 | Zynq® | Artix-7 | No | No | Bubble | Yes | 100 | 28000 | ||||||||||||||||||||||||||||||||||||||||||
OcPoC-XM-001
FPGA Artix-7 Family 28000 Cells 5V Bubble
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Aerotenna | FPGA | FPGA Artix-7 Family 28000 Cells 5V Bubble | Flash | 100 to 125 | Zynq® | Artix-7 | No | No | Bubble | Yes | 100 | 28000 |