LPRP, Low Power Reference Platform features a Board Level Power Management Framework (PMF) for Nios II/SOPC Builder Designs that are Battery Powered

Description

• LPRP, Low Power Reference Platform features a Board Level Power Management Framework (PMF). This framework uses techniques to conserve power in the Cyclone III FPGA and at the board level. The PMF is a layer of software run on the Nios II processor in the Cyclone III FPGA and on an additional micro controller. The PMF permits the highest level of power conservation while retaining the operational status of the LPRP. This is the key ingredient to obtaining extended battery life. The PMF will be discussed subsequently