Nand Flash Controller Reference Design Using the K9F1G08R0A Flash Controller
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- Data Storage Devices
Description
- Nand Flash Controller Reference Design. This reference design is targeted at the Samsung K9F1G08R0A Nand Flash. It supports the reset, read ID, block erase, page program and page read commands. The read status command is supported for the program and erase operations. The other commands are not implemented in this design. This design implements a simple host interface which gives the designer the flexibility to modify this interface to meet the requirements of their host interface system. Flash memory, whether it is in NOR or Nand in structure, is a non-volatile memory that is used to replace traditional EEPROM and hard disks for its low cost and versatility. Because of the difference in the structure of interconnection of the memory cells, NOR Flash is known for its random access capability, while the Nand Flash is known for its compact size
Pièces en vedette (3)
| Pièce numéro | Fabricant | Type | Description | |||
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LCMXO21200HC4TG144CAM5 | Lattice Semiconductor | Complex Programmable Logic Devices - CPLDs | FPGA MachXO2 Family 1280 Cells 65nm Technology 2.5V/3.3V 144-Pin TQFP Tray | Ajouter au panier | |
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LCMXO2-1200HC-4TG144C | Lattice Semiconductor | Complex Programmable Logic Devices - CPLDs | FPGA MachXO2 Family 1280 Cells 65nm Technology 2.5V/3.3V 144-Pin TQFP Tray | Ajouter au panier | |
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LCMXO2-1200HC-4TG144CCU1 | Lattice Semiconductor | Complex Programmable Logic Devices - CPLDs | FPGA MachXO2 Family 1280 Cells 65nm Technology 2.5V/3.3V 144-Pin TQFP Tray | Ajouter au panier | |